r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1511

no-image

r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r8a77850anbgV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
29.5
(1)
• Example 1-1
• Example 1-2
Register settings: CBR0 = H'00000013 / CRR0 = H'00002003 / CAR0 = H'00000404 /
CAMR0 = H'00000000 / CBR1 = H'00000013 / CRR1 = H'00002001 / CAR1 = H'00008010 /
CAMR1 = H'00000006 / CDR1 = H'00000000 / CDMR1 = H'00000000 / CETR1 =
H'00000000 / CBCR = H'00000000
Specified conditions: Independent for channels 0 and 1
⎯ Channel 0
⎯ Channel 1:
With the above settings, the user break occurs after executing the instruction at address
H'00000404 or before executing the instruction at address H'00008010 to H'00008016.
Register settings: CBR0 = H'40800013 / CRR0 = H'00002000 / CAR0 = H'00037226 /
CAMR0 = H'00000000 / CBR1 = H'C0700013 / CRR1 = H'00002001 / CAR1 = H'0003722E /
CAMR1 = H'00000000 / CDR1 = H'00000000 / CDMR1 = H'00000000 / CETR1 =
H'00000000 / CBCR = H'00000000
Specified conditions: Channel 0 → Channel1 sequential mode
⎯ Channel 0
⎯ Channel 1
Match Conditions Are Specified for an Instruction Fetch Cycle
Address: H'00000404 / Address mask: H'00000000
Bus cycle: Instruction fetch (after executing the instruction)
ASID is not included in the conditions.
Address: H'00008010 / Address mask: H'00000006
Data: H'00000000 / Data mask: H'00000000 / Execution count: H'00000000
Bus cycle: Instruction fetch (before executing instruction)
ASID, data values, and execution count are not included in the conditions.
Address: H'00037226 / Address mask: H'00000000 / ASID: H'80
Bus cycle: Instruction fetch (before executing the instruction)
Address: H'0003722E / Address mask: H'00000000 / ASID: H'70
Data: H'00000000 / Data mask: H'00000000 / Execution count: H'00000000
Bus cycle: Instruction fetch (before executing the instruction)
Data values and execution count are not included in the conditions.
User Break Examples
Rev.1.00 Jan. 10, 2008 Page 1481 of 1658
29. User Break Controller (UBC)
REJ09B0261-0100

Related parts for r8a77850anbg