r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 794

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

16. Watchdog Timer and Reset (WDT)
16.3.2
WDTCSR is a 32-bit readable/writable register comprising timer mode-selecting bits and overflow
flags.
WDTCSR should be written to as a longword unit, with H'A5 in the most significant byte. The
value read from this byte is always H'00. WDTCSR is only rest by a power-on reset caused by the
PRESET pin.
Rev.1.00 Jan. 10, 2008 Page 764 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 24
23 to 8
7
6
R/W:
R/W:
Bit:
Bit:
Watchdog Timer Control/Status Register (WDTCSR)
Bit Name
(Code for
writing)
⎯
TME
WT/IT
R/W
31
15
⎯
R
0
0
R/W
30
14
⎯
R
0
0
R/W
29
13
⎯
R
0
0
Initial
Value
All 0
All 0
0
0
Code for writing (H'A5)
R/W
28
12
⎯
R
0
0
R/W
R/W
R/W
R
R/W
R/W
27
11
⎯
R
0
0
R/W
26
10
⎯
R
0
0
Description
Code for writing (H'A5)
These bits are always read as H'00. When writing to
this register, the value written to these bits must be
H'A5.
Reserved
These bits are always read as 0. The write value
should always be 0.
Timer Enable
Starts or stops the timer operation.
0: Stops counting up.
1: Starts counting up.
Timer Mode Select
Specifies whether the WDT is used as a watchdog
timer or interval timer. Up counting may not be
performed correctly if this bit is modified while the
WDT is running.
0: Interval timer mode
1: Watchdog timer mode
R/W
25
⎯
R
0
9
0
R/W
24
⎯
R
0
8
0
R/W
TME
23
⎯
R
0
7
0
WT/IT
R/W
22
⎯
R
0
6
0
RSTS
R/W
21
⎯
R
0
5
0
WOVF
R/W
20
⎯
R
0
4
0
IOVF
R/W
19
⎯
R
0
3
0
18
⎯
⎯
R
R
0
2
0
17
⎯
⎯
R
R
0
1
0
16
⎯
⎯
R
R
0
0
0