r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 637

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(10) PCI Arbiter Interrupt Register (PCIAINT)
In host mode, this register records interrupt sources. When multiple interrupts occur, only the first
source is registered. When an interrupt is disabled, the source is written to the corresponding bit in
this register, and, no interrupt occurs.
Initial value:
Initial value:
Bit
31 to 14 ⎯
13
12
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
Bit:
Bit:
Bit Name
MBI
TBTOI
31
15
R
R
R
R
0
0
30
14
R
R
R
R
0
0
R/WC
MBI
Initial
Value
All 0
0
0
29
13
R
R
R
0
0
R/WC
TOI
28
12
TB
R
R
R
0
0
R/W
SH: R
PCI: R
SH: R/WC
PCI: R
SH: R/WC
PCI: R
R/WC
TOI
MB
27
11
R
R
R
0
0
26
10
R
R
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Master-Broken Interrupt
An interrupt is detected when the master that received
the bus mastership did not start transaction
(PCIFRAME is not asserted) within 16 clock cycles.
0: A master-broken interrupt was not generated
1: A master-broken interrupt was generated
Target Bus Time-Out Interrupt
An interrupt is detected when TRDY or STOP is not
asserted within 16 clock cycles in the first data
transfer or 8 clock cycles in the second and
subsequent data transfer.
0: A target bus timeout interrupt was not generated
1: A target bus timeout interrupt was generated
25
R
R
R
R
0
9
0
24
R
R
R
R
0
8
0
23
R
R
R
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 607 of 1658
22
R
R
R
R
0
6
0
21
R
R
R
R
0
5
0
20
R
R
R
R
0
4
0
13. PCI Controller (PCIC)
R/WC
TAI
19
R
R
R
0
3
0
REJ09B0261-0100
R/WC
MAI
18
R
R
R
0
2
0
R/WC
PEI
RD
17
R
R
R
0
1
0
R/WC
WD
PEI
16
R
R
R
0
0
0

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