r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 825

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

17.5.2
Deep sleep mode is released by means of an interrupt (NMI, IRL, IRQ, GPIO, WDT interval
timer, or H-UDI) or a reset.
SPC, SSR and other related contents should be saved before execute a SLEEP instruction if
necessary.
(1)
When an NMI, IRL, IRQ, GPIO, or WDT interval timer interrupt is generated, deep sleep mode is
released and the interrupt exception handling is executed. The code corresponding to the interrupt
source is set in INTEVT. For details of the timing of the changes in the STATUS pin, that is
similar to sleep mode, see section 17.7.2, Releasing Sleep Mode.
(2)
Deep sleep mode is released by means of a power-on via the PRESET pin or a WDT overflow, H-
UDI reset, or a manual reset by a WDT overflow. For details of the timing of the changes in the
STATUS pin, that is similar to sleep mode, see section 16.5, Status Pin Change Timing during
Reset.
In deep sleep mode, an interrupt request is accepted even if the BL bit in SR is set to 1. The
Release by Interrupt
Release by Reset
Releasing Deep Sleep Mode
Rev.1.00 Jan. 10, 2008 Page 795 of 1658
17. Power-Down Mode
REJ09B0261-0100