r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 878

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

19. Display Unit (DU)
Note:
Rev.1.00 Jan. 10, 2008 Page 848 of 1658
REJ09B0261-0100
Bit
7, 6
5 to 0
*
Bit Name
CSY
⎯
The bit is updated by setting the DRES bit in DSYSR to 1.
Initial
Value
00
All 0
R/W
R/W
R
Internal
Update
None
⎯
Description
CSYNC Mode
For details of CSYNC waveform, refer to section
19.5.2, CSYNC.
00: The relation among VSYNC, HSYNC, and
01: Setting prohibited
10: For the interval of three raster scans after
11: 1/2 raster scan after the VSYNC falling
Reserved
These bits are always read as 0. The write value
should always be 0.
CSYNC is as follows.
the falling edge of VSYNC an equivalent
pulse is output, followed by separation pulse
for three raster scans, then an equivalent
pulse for three raster scans, and for the
interval after this the HSYNC waveform is
output as CSYNC.
edge, an equivalent pulse is output for 2.5
raster scans, then separation pulse for 2.5
raster scans, then an equivalent pulse for
2.5 raster scans, and for the interval after
this the HSYNC waveform is output as
CSYNC.
VSYNC
Low level
Low level
High level
High level
Low level
High level
Low level
High level
HSYNC
CSYNC
High level
High level
Low level
Low level