r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1388

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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27. NAND Flash Memory Controller (FLCTL)
Rev.1.00 Jan. 10, 2008 Page 1358 of 1658
REJ09B0261-0100
Bit
3
2
1
0
Bit Name
BTOINTE
TEINTE
TRINTE1
TRINTE0
Initial
Value
0
0
0
0
R/W
RW
R/W
R/W
R/W
Transfer End Interrupt Enable
Description
Interrupt Enable at Timeout Error
Enables or disables an interrupt request to the CPU
when a timeout error has occurred.
0: Disables the interrupt request to the CPU by a
1: Enables the interrupt request to the CPU by a
Enables or disables an interrupt request to the CPU
when a transfer has been ended (TREND bit in
FLTRCR).
0: Disables an interrupt to the CPU at the end of a
1: Enables an interrupt to the CPU at the end of a
FLECFIFO Transfer Request Enable to CPU
Enables or disables an interrupt request to the CPU by
a transfer request from FLECFIFO.
0: Disables an interrupt request to the CPU by a
1: Enables an interrupt request to the CPU by a transfer
When the DMA transfer is enabled, this bit should be
cleared to 0.
FLDTFIFO Transfer Request Enable to CPU
Enables or disables an interrupt request to the CPU by
a transfer request from FLDTFIFO.
0: Disables an interrupt request to the CPU by a
1: Enables an interrupt request to the CPU by a transfer
When the DMA transfer is enabled, this bit should be
cleared to 0.
transfer
transfer
timeout error
timeout error
transfer request from FLECFIFO.
request from FLECFIFO.
transfer request from FLDTFIFO
request from FLDTFIFO

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