r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 275

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Table 9.3
• Ports
• Priority
Address Space
Virtual address
Physical address
The CPU can access the P4 area in the virtual address space (when SR.MD = 1) or on-chip
memory area (when SR.MD = 0 and RAMCR.RMD = 1). Access operations involving these
addresses are always non-cacheable.
The U memory has three independent read/write ports and is connected to the operand bus, the
cache/RAM internal bus, and the SuperHyway bus. The operand bus is used when the U
memory is accessed through operand read access. The cache/RAM internal bus is used when
the U memory is accessed through instruction fetch and operand write access. The
SuperHyway bus is used for U memory access from the SuperHyway bus master module.
In the event of simultaneous accesses to the U memory from different buses, the access
requests are processed according to priority. The priority order is: SuperHyway bus >
cache/RAM internal bus > operand bus.
U Memory Addresses
Memory Address
H'E55F 0000 to H'E560 FFFF
H'E55F 0000 to H'E560 FFFF
Rev.1.00 Jan. 10, 2008 Page 245 of 1658
9. On-Chip Memory
REJ09B0261-0100