r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1175

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(2)
The transmit sources and receive sources are signals indicating the state; after being set, if the state
changes, they are automatically cleared by the SIOF.
When the DMA transfer is used, a DMA transfer request is pulled low for one cycle at the end of
DMA transfer.
(3)
On occurrence of each of the errors indicated as a status in SISTR, the SIOF performs the
following operations.
• Transmit FIFO underflow (TFUDF)
• Transmit FIFO overflow (TFOVF)
• Receive FIFO overflow (RFOVF)
• Receive FIFO underflow (RFUDF)
• Frame synchronization error (FSERR)
• Slot assign error (SAERR)
The immediately preceding transmit data is again transmitted.
The contents of the transmit FIFO are protected, and the write operation causing the overflow
is ignored.
Data causing the overflow is discarded and lost.
An undefined value is output on the bus.
The internal counter is reset according to the signal in which an error occurs.
⎯ If the same slot is assigned to both serial data and control data, the slot is assigned to serial
⎯ If the same slot is assigned to two control data items, the data cannot be transferred
Regarding Transmit and Receive Classification
Processing when Errors Occur
data.
correctly.
Rev.1.00 Jan. 10, 2008 Page 1145 of 1658
22. Serial I/O with FIFO (SIOF)
REJ09B0261-0100

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