r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 540

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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12. DDR2-SDRAM Interface (DBSC2)
12.4.14 SDRAM Mode Setting Register (DBMRCNT)
The SDRAM mode setting register (DBMRCNT) is a write-only register. If it is read, correct
operation cannot be guaranteed.
Rev.1.00 Jan. 10, 2008 Page 510 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 19 ⎯
18 to 16 BA2 to BA0 Undefined W
15
14 to 0
R/W:
R/W:
BIt:
BIt:
Bit Name
MA14 to
MA0
31
15
W
W
MA14
30
14
W
W
MA13
29
13
Initial
Value
Undefined W
Undefined W
Undefined W
W
W
MA12
28
12
W
W
MA11
27
11
W
W
R/W
MA10
26
10
W
W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
If a value other than 0 is written, correct operation
cannot be guaranteed.
SDRAM Mode Register and Extended Mode Register
Setting Bits
Bank address pins MBA2, MBA1, and MBA0
correspond to bit 18, bit 17, and bit 16, respectively.
Reserved
This bit is always read as 0. The write value should
always be 0.
If a value other than 0 is written, correct operation
cannot be guaranteed.
SDRAM Mode Register and Extended Mode Register
Setting Bits
The address pins MA14, MA13, ..., and MA0
correspond to bit 14, bit 13, ..., and bit 0, respectively.
MA9
25
W
W
9
MA8
24
W
W
8
MA7
23
W
W
7
MA6
22
W
W
6
MA5
21
W
W
5
MA4
20
W
W
4
MA3
19
W
W
3
MA2
BA2
18
W
W
2
MA1
BA1
17
W
W
1
MA0
BA0
16
W
W
0

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