r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 377

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

The local bus state controller (LBSC) divides the external memory space and outputs control
signals according to the specification of each memory and bus interface. The LBSC function
enables connection of the SRAM or ROM, etc. to this LSI. The LBSC also supports the PCMCIA
interface protocol, which implements simple system design and high-speed data transfers in a
compact system.
11.1
The LBSC has the following features.
• Manages areas 0 to 6 of the external memory space divided into seven
• SRAM interface
• Burst ROM interface
⎯ Maximum 64 Mbytes for each of areas 0 to 6
⎯ Bus width of each area can be set by a register (Only the area-0 bus width is set by an
⎯ Wait cycle insertion by the RDY pin
⎯ Wait cycle insertion can be controlled by a program
⎯ Type of memory to be connected is specifiable for each area
⎯ Control signals are output for memory connected to each area
⎯ Automatic wait cycle insertion to prevent data bus collision in consecutive memory
⎯ The write strobe setup and hold time periods can be inserted in a write cycle to connect to
⎯ Wait cycle insertion can be controlled by a program
⎯ Wait cycle insertion can be controlled by a program
⎯ Burst transfers for the number of times specified by the register
external pin.)
accesses
low-speed memory
Connectable area: 0 to 6
Settable bus width: 64, 32, 16 and 8 bits
Connectable area: 0 to 6
Settable bus width: 64, 32, 16 and 8 bits
Features
Section 11 Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 347 of 1658
11. Local Bus State Controller (LBSC)
REJ09B0261-0100