r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 206

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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7. Memory Management Unit (MMU)
Figure 7.15 is a flowchart of memory access using the ITLB in TLB extended mode.
Rev.1.00 Jan. 10, 2008 Page 176 of 1658
REJ09B0261-0100
VA is
in P4 area
EPR[2] = 0 and
Figure 7.15 Flowchart of Memory Access Using ITLB (TLB Extended Mode)
ICBI or normal instruction access?
EPR[0] = 0
Record in ITLB
Hardware ITLB
miss handling
ICBI
No
Yes
VA is
in P2 area
Internal resource access
0
0 (User)
Yes
Instruction access to virtual address (VA)
Instruction TLB
miss exception
Search UTLB
EPR[0]?
Match?
CCR.ICE?
Normal instruction access
No
1
1
VA is
in P1 area
Instruction TLB protection
0
violation exception
No
multiple hit exception
(Non-cacheable)
Memory access
Instruction TLB
VPNs match
and V = 1
Yes
Yes
VA is in P0, U0,
or P3 area
EPR[5] = 0 and
No
No
No
ICBI or normal instruction access?
EPR[3] = 0
No
No
and (MMUCR.SV = 0 or
ICBI
No
ASIDs match, and
entry matches
MMUCR.AT = 1
VPNs match,
SR.MD = 0)
CCR.ICE = 1
Cache access
Only one
SR.MD?
C = 1 and
SH = 0
V = 1
1 (Privileged)
Yes
Yes
Yes
Yes
0
Yes
EPR[3]?
Normal instruction access
1

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