r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 732

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

14. Direct Memory Access Controller (DMAC)
Choose whether DREQ is detected by edge or level with the DREQ level (DL) bit and DREQ
select (DS) bit in CHCR0 to CHCR3 shown in table 14.5. The source of the transfer request does
not have to be the transfer source or transfer destination.
Table 14.5 External Request Detection Selection with DL and DS Bits
When DREQ is accepted, the DREQ pin cannot accept requests. After acknowledge DACK is
output to the accepted DREQ, the DREQ pin can accept requests again.
When DREQ is used for level detection, the timing to detect the next DREQ after outputting
DACK depends on the DO bit in CHCR.
For details, see section 14.4.7, DREQ Pin Sampling Timing.
Table 14.6 Selecting External Request Detection with the DO Bit
DACK can be output to only LBSC space, and is output at the same timing as CSn. The setting
whether DACK is output during the reading or writing cycle is selected by the AM bit in CHCR
shown in table 14.7.
Table 14.7 Acknowledge Mode Selection with AM Bit
Rev.1.00 Jan. 10, 2008 Page 702 of 1658
REJ09B0261-0100
DL
0
1
CHCR
DO
0
1
CHCR
AM
0
1
CHCR
DS
0
1
0
1
External Request
Overrun 0 (initial value)
Overrun 1
External Request
DACK output during the reading cycle (initial value)
DACK output during the writing cycle
Detection of External Request
Low level detection (initial value: DREQ)
Falling edge detection
High level detection
Rising edge detection