r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 395

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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This register should be written by the CPU. Before writing to this register, set that no access will
be generated from the DMAC, GDTA, DU or PCIC and execute the SYNCO instruction
immediately before the MOV instruction to write this register, etc. to prevent remaining
unprocessed access.
Also, execute following instructions immediately after the MOV instruction to write to this
register.
1. MOV instruction to read this register
2. MOV instruction to read this register
3. SYNCO instruction
Bit
2 to 0
Bit Name
AREASEL
Initial
Value
000
R/W
R/W
Description
DDR2-SDRAM/PCI Memory Space Select
000: Sets area 3 (H'0C00 0000 to H'0FFF FFFF) as the
001: Sets area 3 (H'0C00 0000 to H'0FFF FFFF) as the
010: Sets areas 2 and 3 (H'0800 0000 to H'0FFF FFFF)
011: Sets areas 2 and 3 (H'0800 0000 to H'0FFF FFFF)
100: Sets areas 2 to 5 (H'0800 0000 to H'17FF FFFF)
101: Sets areas 2 to 5 (H'0800 0000 to H'17FF FFFF)
110: Sets area 4 (H'1000 0000 to H'13FF FFFF) as the
111: Setting prohibited
DDR2-SDRAM space and the other areas as the
local bus space
DDR2-SDRAM space, area 4 (H'1000 0000 to
H'13FF FFFF) as the PCI space, and the other
areas as the local bus space
as the DDR2-SDRAM space and the other areas
as the local bus space
as the DDR2-SDRAM space, area 4 (H'1000 0000
to H'13FF FFFF) as the PCI space, and the other
areas as the local bus space
as the DDR-SDRAM space
as the local bus space
PCI space, and the other areas as the local bus
space
Rev.1.00 Jan. 10, 2008 Page 365 of 1658
11. Local Bus State Controller (LBSC)
REJ09B0261-0100

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