r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1128

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

21. Serial Communication Interface with FIFO (SCIF)
Thus, the reception margin in asynchronous mode is given by formula (1).
M: Receive margin (%)
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0 to 1.0)
L:
F:
From equation (1), if F = 0 and D = 0.5, the reception margin is 46.875%, as given by formula (2).
When D = 0.5 and F = 0:
However, this is a theoretical value. A reasonable margin to allow in system designs is 20% to
30%.
Rev.1.00 Jan. 10, 2008 Page 1098 of 1658
REJ09B0261-0100
Frame length (L = 9 to 12)
Absolute value of clock rate deviation
M = (0.5 – 1 / (2 × 16) ) × 100% = 46.875% ............................................... (2)
M= (0.5 -
2N
1
) - (L - 0.5) F -
| D - 0.5 |
N
(1 + F) × 100 % .................. (1)