r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1331

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

26.3.1
SSICR is a 32-bit readable/writable register that controls interrupts, selects each polarity status,
and sets operating mode.
Initial value:
Initial value:
Bit
31 to 29
28
27
26
25
24
R/W:
R/W:
Bit:
Bit:
Control Register (SSICR)
SCKD
R/W
Bit Name
⎯
DMEN
UIEN
OIEN
IIEN
DIEN
31
15
⎯
⎯
R
0
SWSD
R/W
⎯
⎯
30
14
0
R
SCKP
R/W
29
⎯
⎯
13
R
0
Initial
Value
0
0
0
0
0
0
DMEN
SWSP SPDP
R/W
R/W
28
12
0
0
UIEN
R/W
R/W
27
11
R/W
R
R/W
R/W
R/W
R/W
R/W
0
0
SDTA
OIEN
R/W
R/W
26
10
0
0
Description
Reserved
These bits are always read as an undefined value. The
write value should always be 0.
DMA Enable
Enables or disables the DMA request.
0: DMA request disabled.
1: DMA request enabled.
Underflow Interrupt Enable
0: Underflow interrupt disabled
1: Underflow interrupt enabled
Overflow Interrupt Enable
0: Overflow interrupt disabled
1: Overflow interrupt enabled
Idle Mode Interrupt Enable
0: Idle mode interrupt disabled
1: Idle mode interrupt enabled
0: Data interrupt disabled
1: Data interrupt enabled
Data Interrupt Enable
PDTA
IIEN
R/W
R/W
25
0
0
9
DIEN
R/W
DEL
R/W
24
0
8
0
CHNL1 CHNL0 DWL2
BREN
R/W
R/W
23
0
7
0
Rev.1.00 Jan. 10, 2008 Page 1301 of 1658
CKDV2 CKDV1 CKDV0
R/W
R/W
22
0
6
0
26. Serial Sound Interface (SSI) Module
R/W
R/W
21
0
0
5
DWL1
R/W
R/W
20
4
0
0
MUEN CPEN TRMD
DWL0 SWL2 SWL1 SWL0
R/W
R/W
19
3
0
0
REJ09B0261-0100
R/W
R/W
18
2
0
0
R/W
R/W
17
0
1
0
R/W
R/W
EN
16
0
0
0