r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 247

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Bit
10, 9
8
7 to 4
3
2
1
0
Bit Name
⎯
ICE
⎯
OCI
CB
WT
OCE
Initial
Value
All 0
0
All 0
0
0
0
0
R/W
R
R/W
R
R/W
R/W
R/W
R/W
Description
Reserved
For details on reading from or writing to these bits, see
description in General Precautions on Handling of
Product.
IC Enable Bit
Selects whether the IC is used. Note however when
address translation is performed, the IC cannot be used
unless the C bit in the page management information is
also 1.
0: IC not used
1: IC used
Reserved
For details on reading from or writing to these bits, see
description in General Precautions on Handling of
Product.
OC Invalidation Bit
When 1 is written to this bit, the V and U bits of all OC
entries are cleared to 0. This bit is always read as 0.
Copy-Back Bit
Indicates the P1 area cache write mode.
0: Write-through mode
1: Copy-back mode
Write-Through Mode
Indicates the P0, U0, and P3 area cache write mode.
When address translation is performed, the value of the
WT bit in the page management information has
priority.
0: Copy-back mode
1: Write-through mode
OC Enable Bit
Selects whether the OC is used. Note however when
address translation is performed, the OC cannot be
used unless the C bit in the page management
information is also 1.
0: OC not used
1: OC used
Rev.1.00 Jan. 10, 2008 Page 217 of 1658
REJ09B0261-0100
8. Caches