r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1300

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

25. Audio Codec Interface (HAC)
To place the off-chip codec device into the power-down mode, write 1 to bit 12 of the register
index 26 in the off-chip codec via the HAC. When entering the power-down mode, the off-chip
codec stops HAC_BITCLK and suspends the normal operation. The off-chip codec acts in the
same manner at power-on. To resume the normal operation, perform a cold reset or a warm reset
on the off-chip codec.
Rev.1.00 Jan. 10, 2008 Page 1270 of 1658
REJ09B0261-0100
Bit
10
9
8 to 6
5
4 to 0
Bit Name
WMRT
⎯
⎯
ST
⎯
Initial
Value
0
1
All 0
0
All 0
R/W
W
R
R
W
R
Description
HAC Warm Reset
Use a warm reset only after power-up, or only to exit
from the power-down mode by the power-down
command.
[Write]
0: Always write 0 to this bit before writing 1 again.
1: Performs a warm reset on the HAC-connected
[Read]
Always read as 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
These bits are always read as 0. The write value should
always be 0.
Start Transfer
[Write]
0: Stops data transmission/reception at the end of the
1: Starts data transmission/reception.
[Read]
Always read as 0.
Reserved
These bits are always read as 0. The write value should
always be 0.
(When this bit is changed from 0 to 1, a warm reset is
performed.)
codec.
current frame. Do not take this action to terminate
transmission/reception in normal operation. When
terminating transmission/reception in normal
operation, refer to the following description.