r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 200

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

7. Memory Management Unit (MMU)
7.4
7.4.1
Figure 7.11 shows the configuration of the UTLB in TLB extended mode. Figure 7.12 shows the
relationship between the page size and address format.
Legend:
• VPN: Virtual page number
• ASID: Address space identifier
• SH: Share status bit
• ESZ: Page size bits
Rev.1.00 Jan. 10, 2008 Page 170 of 1658
REJ09B0261-0100
For 1-Kbyte page: Upper 22 bits of virtual address
For 4-Kbyte page: Upper 20 bits of virtual address
For 8-Kbyte page: Upper 19 bits of virtual address
For 64-Kbyte page: Upper 16 bits of virtual address
For 256-Kbyte page: Upper 14 bits of virtual address
For 1-Mbyte page: Upper 12 bits of virtual address
For 4-Mbyte page: Upper 10 bits of virtual address
For 64-Mbyte page: Upper 6 bits of virtual address
Indicates the process that can access a virtual page.
In single virtual memory mode and user mode, or in multiple virtual memory mode, if the SH
bit is 0, this identifier is compared with the ASID in PTEH when address comparison is
performed.
When 0, pages are not shared by processes.
When 1, pages are shared by processes.
Specify the page size.
0000: 1-Kbyte page
TLB Functions (TLB Extended Mode; MMUCR.ME = 1)
Unified TLB (UTLB) Configuration
Entry 0
Entry 1
Entry 2
Entry 63
Figure 7.11 UTLB Configuration (TLB Extended Mode)
ASID[7:0]
ASID[7:0]
ASID[7:0]
ASID[7:0]
VPN[31:10]
VPN[31:10]
VPN[31:10]
VPN[31:10]
V
V
V
V
PPN[28:10]
PPN[28:10]
PPN[28:10]
PPN[28:10]
ESZ[3:0]
ESZ[3:0]
ESZ[3:0]
ESZ[3:0] SH C EPR[5:0]
SH
SH
SH
C
C
C
EPR[5:0]
EPR[5:0]
EPR[5:0]
D
D
D
D WT
WT
WT
WT