r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1622

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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32. Electrical Characteristics
32.3.4
Table 32.9 DBSC2 Signal Timing
Conditions: V
Rev.1.00 Jan. 10, 2008 Page 1592 of 1658
REJ09B0261-0100
Item
MCK output cycle
MCK output high-level pulse
width
MCK output low-level pulse
width
Address and control signal
setup time to MCK rising edge
Address and control signal hold
time to MCK rising edge
Address and control signal
width
MCLK-to-MDQS skew time
(Read)
MDQS high-level pulse width
(Read)
MDQS low-level pulse width
(Read)
MDQS preamble (Read)
MDQS postamble (Read)
MDQS-to-MDQ skew time
(Read)
MDQ signal hold time to DQS
(Read)
DBSC2 Signal Timing
C
L
DD-DDR
= 30 pF, ODT=on), Drive Strength=Normal
= 1.7 to 1.9 V, V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CH
CL
IS
IH
IPW
RDQSDLY
RDQSH
RDQSL
RPRE
RPST
RDQSQ
RQH
ref
= 0.9 V, V
Min.
3.33
0.45
0.45
880
1290
880
1290
0.6
−0.2
0.35
0.35
0.9
0.4
−390
−590
0.45 × t
−470
0.45 × t
−630
DD
= 1.1 V, T
MCK
MCK
Max.
5.0
0.55
0.55
1.4
0.65
0.65
1.1
0.6
390
590
a
= −20 to +85/−40 to 85°C,
Unit
ns
t
t
ps
ps
t
ns
t
t
t
t
ps
ps
MCK
MCK
MCK
MCK
MCK
MCK
MCK
Figure
Notes
DDR2-600
DDR2-400
DDR2-600
DDR2-400
DDR2-600
DDR2-400
DDR2-600
DDR2-400

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