r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 202

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

7. Memory Management Unit (MMU)
• C: Cacheability bit
• D: Dirty bit
• WT: Write-through bit
Rev.1.00 Jan. 10, 2008 Page 172 of 1658
REJ09B0261-0100
EPR[1]: Writing in user mode
EPR[0]: Execution in user mode (instruction fetch)
Indicates whether a page is cacheable.
0: Not cacheable
1: Cacheable
When the control register area is mapped, this bit must be cleared to 0.
Indicates whether a write has been performed to a page.
0: Write has not been performed.
1: Write has been performed.
Specifies the cache write mode.
0: Copy-back mode
1: Write-through mode