DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 1291

BOARD DEMO FOR MC9S12XEP100

DEMO9S12XEP100

Manufacturer Part Number
DEMO9S12XEP100
Description
BOARD DEMO FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12XEP100

Contents
Board, Cables, CD
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DEMO9S12XEP100
Manufacturer:
PANASONIC
Quantity:
46 000
Part Number:
DEMO9S12XEP100
Manufacturer:
Freescale Semiconductor
Quantity:
135
0x00130–0x0137 Asynchronous Serial Interface (SCI4) Map
1
2
0x0138–0x013F Asynchronous Serial Interface (SCI5) Map
Freescale Semiconductor
Address
Address
0x013C
0x0130
0x0131
0x0132
0x0130
0x0131
0x0132
0x0133
0x0134
0x0135
0x0136
0x0137
0x0138
0x0139
0x013A
0x0138
0x0139
0x013A
0x013B
Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to zero
Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to one
SCI4ACR1
SCI4ACR2
SCI5ACR1
SCI5ACR2
SCI4ASR1
SCI5ASR1
SCI4BDH
SCI5BDH
SCI4CR1
SCI5CR1
SCI4BDL
SCI5BDL
SCI4DRH
SCI4CR2
SCI4SR1
SCI4SR2
SCI4DRL
SCI5CR2
SCI5SR1
Name
Name
1
1
1
1
1
1
2
2
2
2
2
2
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RXEDGIF
RXEDGIE
RXEDGIF
RXEDGIE
LOOPS
LOOPS
AMAP
TDRE
TDRE
SBR7
SBR7
IREN
IREN
Bit 7
Bit 7
TIE
TIE
R8
R7
T7
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
SCISWAI
SCISWAI
TNP1
SBR6
TNP1
SBR6
TCIE
TCIE
Bit 6
Bit 6
TC
R6
TC
T8
T6
0
0
0
0
0
0
0
RSRC
RSRC
RDRF
RDRF
TNP0
SBR5
TNP0
SBR5
Bit 5
Bit 5
RIE
RIE
R5
T5
0
0
0
0
0
0
0
0
SBR12
TXPOL
SBR12
SBR4
SBR4
Bit 4
IDLE
Bit 4
IDLE
ILIE
ILIE
R4
T4
M
M
0
0
0
0
0
0
0
RXPOL
SBR11
SBR11
WAKE
WAKE
SBR3
SBR3
Bit 3
Bit 3
OR
OR
TE
R3
TE
T3
0
0
0
0
0
0
0
Appendix E Detailed Register Address Map
BERRM1
BERRM1
BERRV
BERRV
SBR10
BRK13
SBR10
SBR2
SBR2
Bit 2
Bit 2
ILT
RE
NF
ILT
RE
NF
R2
T2
0
0
0
BERRM0
BERRM0
BERRIF
BERRIE
BERRIF
BERRIE
TXDIR
SBR9
SBR1
SBR9
SBR1
RWU
RWU
Bit 1
Bit 1
PE
FE
R1
PE
FE
T1
0
BKDFE
BKDFE
BKDIE
BKDIE
BKDIF
BKDIF
SBR8
SBR0
SBR8
SBR0
Bit 0
Bit 0
SBK
RAF
SBK
PT
PF
R0
PT
PF
T0
0
1291

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