DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 202

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 3 Memory Mapping Control (S12XMMCV4)
3.3.2.4
Read: Anytime
Write: anytime in special modes, one time only in other modes.
This register determines the position of the 256 Byte direct page within the memory map.It is valid for both
global and local mapping scheme.
Bits [22:16] of the global address will be formed by the GPAGE[6:0] bits in case the CPU executes a global
instruction in direct addressing mode or by the appropriate local address to the global address expansion
(refer to
202
Address: 0x0011
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
DP[15:8]
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7–0
W
R
Section 3.4.2.1.1, “Expansion of the Local Address
MOVB
LDY
DP15
Direct Page Index Bits 15–8 — These bits are used by the CPU when performing accesses using the direct
addressing mode. The bits from this register form bits [15:8] of the address (see
Example 3-2. This example demonstrates usage of the Direct Addressing Mode
Direct Page Register (DIRECT)
0
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Bit22
#0x80,DIRECT
<00
DP14
0
6
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 3-10. DIRECT Field Descriptions
Figure 3-9. DIRECT Address Mapping
Figure 3-8. Direct Register (DIRECT)
Bit16
DP13
Global Address [22:0]
5
0
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
Bit15
CAUTION
DP12
DP [15:8]
0
4
Description
CPU Address [15:0]
Bit8
DP11
Map).
0
3
Bit7
DP10
2
0
Figure
Freescale Semiconductor
Bit0
DP9
3-9).
0
1
DP8
0
0