DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 799

BOARD DEMO FOR MC9S12XEP100

DEMO9S12XEP100

Manufacturer Part Number
DEMO9S12XEP100
Description
BOARD DEMO FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12XEP100

Contents
Board, Cables, CD
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DEMO9S12XEP100
Manufacturer:
PANASONIC
Quantity:
46 000
Part Number:
DEMO9S12XEP100
Manufacturer:
Freescale Semiconductor
Quantity:
135
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
22.3.2.6
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0006
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
TSFRZ
TSWAI
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
TEN
7
6
5
W
R
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator because the ÷64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
TSWAI also affects pulse accumulator.
Timer Stops While in Freeze Mode
0 Allows the timer counter to continue running while in freeze mode.
1 Disables the timer counter whenever the MCU is in freeze mode. This is useful for emulation.
TSFRZ does not stop the pulse accumulator.
Timer System Control Register 1 (TSCR1)
0
7
out of wait.
= Unimplemented or Reserved
TSWAI
Figure 22-12. Timer System Control Register 1 (TSCR1)
0
6
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-6. TSCR1 Field Descriptions
TSFRZ
5
0
TFFCA
0
4
Description
Chapter 22 Timer Module (TIM16B8CV2) Block Description
PRNT
0
3
2
0
0
0
0
1
0
0
0
799

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