DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 669

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.0.7
Read: Anytime
Write: Anytime
17.3.0.8
Freescale Semiconductor
Module Base + 0x0006
Module Base + 0x0007
Module Base + 0x0008, 0x0009
Reset
PMTLD[7:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
PTF[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
W
R
7:0
7:0
W
W
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
R
R
15
0
PMTLD7
PMTLD7
PIT Time-out Flag Bits for Timer Channel 7:0 — PTF is set when the corresponding 16-bit timer modulus
down-counter and the selected 8-bit micro timer modulus down-counter have counted to zero. The flag can be
cleared by writing a one to the flag bit. Writing a zero has no effect. If flag clearing by writing a one and flag setting
happen in the same bus clock cycle, the flag remains set. The flag bits are cleared if the PIT module is disabled
or if the corresponding timer channel is disabled.
0 Time-out of the corresponding PIT channel has not yet occurred.
1 Time-out of the corresponding PIT channel has occurred.
PIT Micro Timer Load Bits 7:0 — These bits set the 8-bit modulus down-counter load value of the micro timers.
Writing a new value into the PITMTLD register will not restart the timer. When the micro timer has counted down
to zero, the PMTLD register value will be loaded. The PFLMT bits in the PITCFLMT register can be used to
immediately update the count register with the new value if an immediate load is desired.
PIT Micro Timer Load Register 0 to 1 (PITMTLD0–1)
PIT Load Register 0 to 7 (PITLD0–7)
0
0
7
7
14
0
13
0
PMTLD6
PMTLD6
Figure 17-10. PIT Micro Timer Load Register 1 (PITMTLD1)
Figure 17-9. PIT Micro Timer Load Register 0 (PITMTLD0)
0
0
6
6
12
0
Table 17-8. PITMTLD0–1 Field Descriptions
Figure 17-11. PIT Load Register 0 (PITLD0)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 17-7. PITTF Field Descriptions
PMTLD5
PMTLD5
11
0
5
0
5
0
10
0
PMTLD4
PMTLD4
0
9
0
0
4
4
Description
Description
0
8
PMTLD3
PMTLD3
7
0
0
0
3
3
Chapter 17 Periodic Interrupt Timer (S12PIT24B8CV2)
0
6
PMTLD2
PMTLD2
0
5
2
0
2
0
0
4
PMTLD1
PMTLD1
0
3
0
0
1
1
0
2
PMTLD0
PMTLD0
0
1
0
0
0
0
0
0
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