DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 326

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 8 S12X Debug (S12XDBGV3) Module
8.3.2.8.3
Read: Anytime. See
Write: If DBG not armed. See
8.3.2.8.4
Read: Anytime. See
Write: If DBG not armed. See
326
Address: 0x002A
Address: 0x002B
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Bit[15:8]
Bits[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
7–0
7–0
W
W
R
R
Bit 15
Comparator Address Mid Compare Bits— The Comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Bit 7
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the
selected comparator will compare the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
0
7
7
Debug Comparator Address Mid Register (DBGXAM)
Debug Comparator Address Low Register (DBGXAL)
Figure 8-16. Debug Comparator Address Mid Register (DBGXAM)
Figure 8-17. Debug Comparator Address Low Register (DBGXAL)
Table 8-29
Table 8-29
Bit 14
Bit 6
0
0
6
6
Table 8-29
Table 8-29
MC9S12XE-Family Reference Manual , Rev. 1.23
for visible register encoding.
for visible register encoding.
Table 8-33. DBGXAM Field Descriptions
Table 8-34. DBGXAL Field Descriptions
Bit 13
Bit 5
5
0
5
0
for visible register encoding.
for visible register encoding.
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
2
0
2
0
Freescale Semiconductor
Bit 9
Bit 1
0
0
1
1
Bit 8
Bit 0
0
0
0
0