DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 460

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 XGATE (S12XGATEV3)
XNOR
Operation
~(RS1 ^ RS2)
~(RD ^ IMM16)⇒ RD
(translates to XNOR RD, #IMM16{15:8]; XNOR RD, #IMM16[7:0])
Performs a bit wise logical exclusive NOR between two 16 bit values and stores the result in the destination
register RD.
Remark: Using R0 as a source registers will calculate the one’s complement of the other source register.
Using R0 as both source operands will fill RD with $FFFF.
CCR Effects
Code and CPU Cycles
460
N:
Z:
V:
C:
XNOR RD, RS1, RS2
XNOR RD, #IMM16
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Refer to XNORH instruction for #IMM16 operations.
0; cleared.
Not affected.
Z
∆
V
0
Source Form
—
When using immediate addressing mode (XNOR RD, #IMM16), the Z-flag
of the first instruction (XNORL RD, #IMM16[7:0]) is not considered by the
second instruction (XNORH RD, #IMM16[15:8]).
⇒ Don’t rely on the Z-Flag.
C
⇒ RD
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
IMM8
IMM8
TRI
Logical Exclusive NOR
0
1
1
NOTE
0
0
0
0
1
1
1
1
1
0
0
1
Machine Code
RD
RD
RD
RS1
IMM16[15:8]
IMM16[7:0]
RS2
XNOR
Freescale Semiconductor
1
1
Cycles
P
P
P