DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 755

BOARD DEMO FOR MC9S12XEP100

DEMO9S12XEP100

Manufacturer Part Number
DEMO9S12XEP100
Description
BOARD DEMO FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12XEP100

Contents
Board, Cables, CD
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DEMO9S12XEP100
Manufacturer:
PANASONIC
Quantity:
46 000
Part Number:
DEMO9S12XEP100
Manufacturer:
Freescale Semiconductor
Quantity:
135
Figure 20-26
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
20.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
RT Clock
RT Clock
Samples
Samples
20-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
Framing Errors
1
1
1
1
1
1
1
1
1
1
MC9S12XE-Family Reference Manual Rev. 1.23
Figure 20-26. Start Bit Search Example 5
1
Figure 20-27. Start Bit Search Example 6
1
1
1
1
1
1
1
0
0
0
0
0
1
Chapter 20 Serial Communication Interface (S12SCIV5)
Start Bit
0
Start Bit
1
1
0
0
0
No Start Bit Found
1
0
0
0
0
0
0
LSB
LSB
755

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