DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 626

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
The following gives a short programming example of the usage of the CANTBSEL register:
To get the next available transmit buffer, application software must read the CANTFLG register and write
this value back into the CANTBSEL register. In this example Tx buffers TX1 and TX2 are available. The
value read from CANTFLG is therefore 0b0000_0110. When writing this value back to CANTBSEL, the
Tx buffer TX1 is selected in the CANTXFG because the lowest numbered bit set to 1 is at bit position 1.
Reading back this value out of CANTBSEL results in 0b0000_0010, because only the lowest numbered
bit position set to 1 is presented. This mechanism eases the application software’s selection of the next
available Tx buffer.
If all transmit message buffers are deselected, no accesses are allowed to the CANTXFG registers.
16.3.2.12 MSCAN Identifier Acceptance Control Register (CANIDAC)
The CANIDAC register is used for identifier acceptance control as described below.
1. Read: Anytime
626
Module Base + 0x000B
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are read-only
TX[2:0]
Field
•
•
•
2-0
Reset:
LDAA CANTFLG; value read is 0b0000_0110
STAA CANTBSEL; value written is 0b0000_0110
LDAA CANTBSEL; value read is 0b0000_0010
W
R
Transmit Buffer Select — The lowest numbered bit places the respective transmit buffer in the CANTXFG
register space (e.g., TX1 = 1 and TX0 = 1 selects transmit buffer TX0; TX1 = 1 and TX0 = 0 selects transmit
buffer TX1). Read and write accesses to the selected transmit buffer will be blocked, if the corresponding TXEx
bit is cleared and the buffer is scheduled for transmission (see
Register
0 The associated message buffer is deselected
1 The associated message buffer is selected, if lowest numbered bit
The CANTBSEL register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK=1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
Figure 16-15. MSCAN Identifier Acceptance Control Register (CANIDAC)
7
(CANTFLG)”).
= Unimplemented
Table 16-17. CANTBSEL Register Field Descriptions
6
0
0
MC9S12XE-Family Reference Manual , Rev. 1.23
IDAM1
0
5
NOTE
IDAM0
4
0
Description
0
0
3
Section 16.3.2.7, “MSCAN Transmitter Flag
IDHIT2
2
0
Access: User read/write
Freescale Semiconductor
IDHIT1
0
1
IDHIT0
0
0
(1)