DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 690

BOARD DEMO FOR MC9S12XEP100

DEMO9S12XEP100

Manufacturer Part Number
DEMO9S12XEP100
Description
BOARD DEMO FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12XEP100

Contents
Board, Cables, CD
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
DEMO9S12XEP100
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Part Number:
DEMO9S12XEP100
Manufacturer:
Freescale Semiconductor
Quantity:
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Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
Whenever the micro timer down-counter has counted to zero the PITMTLD register is reloaded and the
connected 16-bit modulus down-counters count one cycle.
Whenever a 16-bit timer counter and the connected 8-bit micro timer counter have counted to zero, the
PITLD register is reloaded and the corresponding time-out flag PTF in the PIT time-out flag (PITTF)
register is set, as shown in
micro timer load (PITMTLD) registers and the bus clock f
For example, for a 40 MHz bus clock, the maximum time-out period equals:
The current 16-bit modulus down-counter value can be read via the PITCNT register. The micro timer
down-counter values cannot be read.
The 8-bit micro timers can individually be restarted by writing a one to the corresponding force load micro
timer PFLMT bits in the PIT control and force load micro timer (PITCFLMT) register. The 16-bit timers
can individually be restarted by writing a one to the corresponding force load timer PFLT bits in the PIT
forceload timer (PITFLT) register. If desired, any group of timers and micro timers can be restarted at the
same time by using one 16-bit write to the adjacent PITCFLMT and PITFLT registers with the relevant
bits set, as shown in
690
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Note 1. The PTF flag clearing depends on the software
16-Bit Force Load
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
PITCNT Register
8-Bit Force Load
Timer Counter
time-out period = (PITMTLD + 1) * (PITLD + 1) / f
256 * 65536 * 25 ns = 419.43 ms.
8-Bit Micro
PTF Flag
Bus Clock
PITTRIG
1
Figure
00
0
2
Figure
18-20.
0001
Time-Out Period
Figure 18-20. PIT Trigger and Flag Signal Timing
1
MC9S12XE-Family Reference Manual , Rev. 1.23
0
18-20. The time-out period is a function of the timer load (PITLD) and
2
0000
1
0
2
0001
1
0
BUS
2
0000
BUS
:
1
.
2
Time-Out Period
0001
1
After Restart
0
2
0000
1
Freescale Semiconductor
0
2
0001
1
0
2

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