DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 394

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 XGATE (S12XGATEV3)
ADDL
Operation
RD + $00:IMM8 ⇒ RD
Adds the content of register RD and an unsigned immediate 8 bit constant using binary addition and stores
the result in the destination register RD. This instruction must be used first for a 16 bit immediate addition
in conjunction with the ADDH instruction.
CCR Effects
Code and CPU Cycles
394
N:
Z:
V:
C:
ADDL RD, #IMM8
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
∆
old
old
V
∆
Source Form
& RD[15]
& RD[15]
C
∆
new
new
MC9S12XE-Family Reference Manual , Rev. 1.23
Add Immediate 8 bit Constant
Address
Mode
IMM8
1
(Low Byte)
1
1
0
0
Machine Code
RD
IMM8
Freescale Semiconductor
ADDL
Cycles
P