MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 1237

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

21.3.1.3
The watchpoint monitor address mask register (WMAMR) shown in
address in the WMAR.
Table 21-10
21.3.1.4
The watchpoint monitor transaction mask register (WMTMR), shown in
transaction types to monitor. WMTMR allows users to qualify watchpoint events specifically with any
combination of transaction types. As shown in
transaction types; one for each interface. Setting a bit enables watchpoint monitoring for the corresponding
transaction types.
Because the supported transaction types vary by interface, the type designated by a WMTMR field also
depends on the interface specified by WMCR1[IFSEL].
each WMTMR bit by interface.
Freescale Semiconductor
Offset 0x014
Reset
Offset 0x018
Reset
0–31
Bits
0–31
Bits
W
W
R
R
0
0
WMAM Watchpoint monitor address mask. A value of zero masks the address comparison for the corresponding
Name
Name
WMA
describes the WMAMR fields.
Watchpoint Monitor Transaction Mask Register (WMTMR)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Watchpoint Monitor Address Mask Register (WMAMR)
address bit. These bits only mask the address bits generated by the hardware, but do not affect the bits
specified in WMAR. A bit that is masked from the comparison should be set to 0 in WMAR.
Figure 21-6. Watchpoint Monitor Transaction Mask Register (WMTMR)
Watchpoint monitor address.
Figure 21-5. Watchpoint Monitor Address Mask Register (WMAMR)
Table 21-10. WMAMR Field Descriptions
Table 21-9. WMAR Field Descriptions
Table
All zeros
All zeros
WMAM
WMTM
21-11, each bit represents as many as four separate
Table 21-12
Description
Description
Figure 21-5
lists transaction types associated with
Figure
Debug Features and Watchpoint Facility
contains the mask for the
21-6, specifies which
Access: Read/Write
Access: Read/Write
21-13
31
31