MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 712

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MPC8533EVTAQGA

Manufacturer Part Number
MPC8533EVTAQGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTAQGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8533EVTAQGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Local Bus Controller
Setup and Hold Timing Calculations:
Address TOF (time of flight): board layout delay
Data TOF (time of flight): board layout delay
Clock skew (time of flight): clock skew between the LBC and the clock at the memory device. The local
bus PLL feedback mechanism must be used to control this skew to optimize the timing margins, as
described in the rest of this subsection.
Address setup margin = cycle time – local bus address CTQ – SDRAM address input setup time – address
TOF + clock skew
Address hold margin = local bus address output hold time + address TOF – SDRAM address input hold
time – clock skew
Data write to SDRAM setup margin = cycle time – local bus data CTQ – SDRAM data input setup time –
data TOF + clock skew
Data write to SDRAM hold margin = local bus data output hold time + data TOF – SDRAM data input
hold time – clock skew
Data read from SDRAM setup margin = cycle time – SDRAM data CTQ – local bus data input setup time
– data TOF – clock skew
Data read from SDRAM hold margin = SDRAM data output hold time + data TOF – local bus data input
hold time + clock skew
14-94
Note:AC characteristics compiled from worst-case numbers from various data sheets from Samsung and
CLK cycle time
CLK to valid output delay
Output data hold time
Input setup time
Input hold time
CLK to output in Hi-Z
Micron.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Parameter
Table 14-43. SDRAM AC Characteristics
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
Min
2.5
1.5
6
1
166 MHz
1000
Max
Device Speed
5
5
Min
7.5
7.5
5.4
5.4
3
3
2
1
133 MHz
1000
Max
Freescale Semiconductor
5.4
5.4
Unit
ns
ns
ns
ns
ns
ns

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