MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 906

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Enhanced Three-Speed Ethernet Controllers
The TxBD fields are detailed in
15-176
Offset
0–1
Bits
0
1
2
3
4
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
PAD/CRC Padding for frames. (Valid only while it is set in the first BD and MACCFG2[PAD enable] is cleared).
Name
Table 15-146. Transmit Data Buffer Descriptor (TxBD) Field Descriptions
W
R
L
I
Ready, written by eTSEC and user.
0 The data buffer associated with this BD is not ready for transmission. The user is free to
1 The data buffer, which is prepared for transmission by the user, was not transmitted or is currently
If MACCFG2[PAD enable] is sector if the eTSEC is operating in FIFO mode (ECTRL[FIFM] is set),
this bit is ignored.
0 Do not add padding to short frames.
1 Add PAD to frames. PAD bytes are inserted until the length of the transmitted frame equals 64
Wrap. Written by user.
0 The next buffer descriptor is found in the consecutive location.
1 The next buffer descriptor is found at the location defined in TBASE.
Interrupt. Written by user.
0 No interrupt is generated after this buffer is serviced.
1 IEVENT[TXB] or IEVENT[TXF] are set after this buffer is
Last in frame. Written by user.
0 The buffer is not the last in the transmit frame.
1 The buffer is the last in the transmit frame.
manipulate this BD or its associated data buffer. The eTSEC clears this bit after the buffer is
transmitted or after an error condition is encountered.
being transmitted. No fields of this BD may be written by the user once this bit is set.
bytes. Unlike the MPC8260 which PADs up to MINFLR value, the eTSEC PADs always up to the
IEEE minimum frame length of 64 bytes. CRC is always appended to frames.
interrupt if they are enabled (That is, IEVENT[TXBEN] or IEVENT[TXFEN] are set).
Table
15-146.
Description
serviced.
These bits can cause an
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