MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 500

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Security Engine (SEC) 2.1
For any sequence of data parcels accessed by a link table or chain of link tables, the combined lengths of
the parcels (the sum of their LENGTH and/or EXTENT fields) must equal the combined lengths of the link
table memory segments (SEGLEN fields). Otherwise the channel sets the appropriate error state in the
channel pointer status register—G-STATE for gather error or S-STATE for scatter error (see Section
12.5.1.2).
12-22
16–21
24–27
28–31
32–63 SEGPTR Segment pointer: A memory address.
0–15
Bits
22
23
Example (from
type calls for the channel to read a data parcel using Pointer3 and Extent3 fields, and assume that
J3 = 1. Due to the J3 value, Pointer3 is not used as a data address but instead used as the address
of a link table. The channel begins by reading the first four long words starting at Pointer3 into an
internal ‘gather table buffer’.
Using the first entry of the gather table buffer, the channel starts accessing the data parcel by
reading SEGLEN bytes beginning at SEGPTR. If the required data parcel size (Extent3) is greater
than this first SegLen, the channel moves on to the next entry of the gather table buffer, and reads
SEGLEN bytes starting at SEGPTR. While there are more bytes to be read in the data parcel, this
process continues. If the channel’s gather table buffer is exhausted, the channel reads the next four
long words of the link table into its gather table buffer. If a gather table buffer entry is encountered
in which the N bit is set, the channel uses the SEGPTR field in that word to find the next link table
in the chain. The last byte of the required parcel size (Extent3) must coincide with the last byte of
a memory segment, or unpredictable results may occur.
SEGLEN Length. When N=0, a number in the range 1 to 65535, specifying the number of bytes in the memory
Name
EPTR
—
—
R
N
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
segment. pointed to by SEGPTR. A value of 0 will cause an error state to be set in the channel pointer status
register—G-STATE for a gather operation or S-STATE for a scatter operation (see Section 12.5.1.2).
When N=1, must be 0.
Reserved
Return.
When N=0:
0 No special action.
1 This is the last entry in the chain of link tables. If this entry does not specify the right number of bytes to
complete the last data parcel, a G-STATE or S-STATE error will be set in the channel pointer status register
(see Section 12.5.1.2).
When N=1, ignored.
Next.
0 No special action.
1 This is the last long word in the current link table. The SEGPTR field is the address of the next link table
in the chain.
Reserved
Extended Pointer. Concatenated as the top 4 bits of the segment pointer when EAE is high (see the EAE
bit in Table 1-51 on page 1-116).
Figure
12-7): To demonstrate use of a link table, assume that the current descriptor
Table 12-8. Link Table Field Definitions
Description
Freescale Semiconductor