MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 484

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MPC8533EVTAQGA

Manufacturer Part Number
MPC8533EVTAQGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTAQGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8533EVTAQGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Security Engine (SEC) 2.1
double each use of all four finite field operations. Similarly, point multiplication uses all elliptic curve
point operations as well as the finite field operations. All these functions are supported both in modular
arithmetic as well as polynomial basis finite fields.
12.1.2.1.2
The PKEU is also capable of performing ordinary integer modulo arithmetic. This arithmetic is an integral
part of the RSA public key algorithm; however, it can also play a role in the generation of ECC digital
signatures (including ECDSA) and Diffie-Hellman key exchanges.
Modular arithmetic functions supported by the SEC’s PKEU include the following (refer to
for a complete list):
where A′ = AR mod N, N is the modulus vector, A and B are input vectors, E is the exponent vector, and
R is 2
The PKEU can perform modular arithmetic on operands up to 2048 bits in length. The modulus must be
larger than or equal to 97 bits (13 bytes). This is not seen as a limitation since for sizes smaller than this,
no useful cryptographic application exists. Furthermore, for small data sizes the overhead of using a
hardware accelerator would not be justified. The PKEU uses the Montgomery modular multiplication
algorithm to perform core functions. The addition and subtraction functions help support known methods
of the Chinese remainder theorem (CRT) for efficient implementation of the RSA algorithm.
12.1.2.2
The DES execution unit (DEU) performs bulk data encryption/decryption, in compliance with the Data
Encryption Standard algorithm (ANSI x3.92). The DEU can also compute 3DES, an extension of the DES
algorithm in which each 64-bit input block is processed three times. The SEC supports 2-key (K1=K3) or
3-key 3DES.
The DEU operates by permuting 64-bit data blocks with a shared 56-bit key and an initialization vector
(IV). The SEC supports two modes of operation: electronic code book (ECB) and cipher clock chaining
(CBC).
For more information, refer to
12.1.2.3
The AFEU accelerates a bulk encryption algorithm compatible with the RC4 stream cipher from RSA
Security, Inc. The algorithm is byte-oriented, meaning a byte of plain text is encrypted with a key to
produce a byte of ciphertext. The key is variable length and the AFEU supports key lengths from 8 to
12-6
s
, where s is the bit length of the N vector rounded up to the nearest multiple of 32.
R
A′
(A × B) R
(A × B) R
(A + B) mod N
(A – B) mod N
2
E
mod N
mod N
Data Encryption Standard Execution Unit (DEU)
ARC Four Execution Unit (AFEU)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Modular Exponentiation Operations
–1
–2
mod N
mod N
Section 12.4.2, “Data Encryption Standard Execution Unit (DEU).”
Freescale Semiconductor
Table 12-10

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