MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 506

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Offset PKEU 0x3_C040
Reset
Security Engine (SEC) 2.1
12.4.1.3
The AB size register
required. The unit of the value written into the AB size is in bits, even though internally the PKEU imposes
a 32-bit alignment. Any data beyond the number of bits in the AB size register, either in A and B-RAM
(operands) will be ignored. No error checking is performed whether the operand sizes are greater than the
prime modulus or the field size and this may result in a wrong result. In other words, it is assumed that
operands are modulo reduced before being written into the PKEU. Hence, the AB size must be less than
or equal to data size for a correct result. If the AB size register is modified during processing, an error is
generated.
An illegal data size error is generated as follows:
An AB size = 0 (either intentionally written, or by ignoring and not writing at all) generates an illegal size
error, except for routines that do not require an A or B operand such as the
12.4.1.4
The PKEU data size register,
modulus or irreducible polynomial. Any value written to this register that is a multiple of 32 bits (for
example, 128 bits, 160 bits,...), is represented internally as the same value (128 bits, 160 bits,...). Any value
written that is not a multiple of 32 bits (for example, 132 bits, 161 bits,...), is represented internally as the
next larger 32 bit multiple (160 bits, 196 bits,...). This internal rounding up to the next 32-bit multiple is
described for information only. The minimum size valid for all routines to operate properly is 97 bits
(internally 128 bits). The maximum size to operate properly is 2048 bits. A value in bits larger than 2048
results in a data size error.
12-28
Offset PKEU 0x3_C010
Reset
W
R
W
•
•
R
0
0
For all non ECC routines a data size > 256 generates an illegal data size error.
For all ECC routines a data size > 64 generates an illegal data size error.
PKEU AB Size Register (PKEUABS)
PKEU Data Size Register (PKEUDSR)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
(Figure
12-9) represents the operand size for the specific operands whenever it is
Figure
Figure 12-10. PKEU Data Size Register
Figure 12-9. PKEU AB Size Register
12-10, specifies, in bits, the size of the significant portion of the
—
—
All zeros
All zeros
CLEAR_MEM
51 52
51 52
Freescale Semiconductor
routine.
Access: Read/Write
Access: Read/Write
DATA SIZE
AB SIZE
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