MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 761

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

15.5.3.1.6
ECNTRL is a register writable by the user to reset, configure, and initialize the eTSEC. Note that the
FIFM, GMIIM, TBIM, RPM, and RMM fields are read-only, having been set after sampling signals at
power-on-reset.
Figure 15-7
Freescale Semiconductor
16–27
Offset eTSEC1:0x2_4020; eTSEC3:0x2_6020
Reset
Reset
Bits
14
15
28
29
30
31
W
W
R
R FIFM
16
0
PERRDIS
XFUNDIS
CRLDIS
DPEDIS
FIRDIS
FIQDIS
Name
describes the definition for the ECNTRL register.
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CLRCNT AUTOZ STEN
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Ethernet Control Register (ECNTRL)
17
Collision retry limit disable.
0 Allow eTSEC to report IEVENT[CRL] status, set the buffer descriptor RL field, and halt buffer
1 Do not set IEVENT[CRL] nor the buffer descriptor RL field, and do not halt buffer descriptor queue if
Transmit FIFO underrun disable.
0 Allow eTSEC to report IEVENT[XFUN] status, set the buffer descriptor UN field, and halt buffer
1 Do not set IEVENT[XFUN] nor the buffer descriptor UN field, and do not halt buffer descriptor queue
Reserved
Filer invalid result error disable.
0 Allow eTSEC to report IEVENT[FIR] status.
1 Do not set IEVENT[FIR] if eTSEC fails to reach a definite filer result when attempting to file a received
Filed frame to invalid queue error disable.
0 Allow eTSEC to report IEVENT[FIQ] status.
1 Do not set IEVENT[FIQ] if eTSEC attempts to file a received frame to an invalid (disabled) RxBD ring,
Data parity error disable.
0 Allow eTSEC to report IEVENT[DPE] status.
1 Do not set IEVENT[DPE] if a parity error occurs in eTSEC’s FIFO or filer arrays.
Receive frame parse error disable.
0 Allow eTSEC to report IEVENT[PERR] status.
1 Do not set IEVENT[PERR] if a parse error occurs on a received frame.
descriptor queue if CRL condition occurs.
CRL condition occurs.
descriptor queue if XFUN condition occurs.
if XFUN condition occurs.
frame, but discard the frame silently.
but discard the frame silently.
18
Table 15-9. EDIS Field Descriptions (continued)
19
Figure 15-7. ECNTRL Register Definition
20
—
All zeros
All zeros
—
24
Description
GMIIM TBIM RPM
25
26
Enhanced Three-Speed Ethernet Controllers
27
R100M
28
RMM
29
Access: Mixed
—
30
15-31
—
15
31