EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 237

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZA50EG

Manufacturer Part Number
EZ80F91AZA50EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet

Specifications of EZ80F91AZA50EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4563

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZA50EG
Manufacturer:
Zilog
Quantity:
10 000
Table 127. I
PS027001-0707
Bit
Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
IEN
6
ENAB
5
STA
4
STP
3
IFLG
2
AAK
[1:0]
2
C Control Register
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
00
R/W
I
I
The I
The I
Master mode START condition is sent.
Master mode start-transmit START condition on the bus.
Master mode STOP condition is sent.
Master mode stop-transmit STOP condition on the bus.
I
I
Not Acknowledge.
Acknowledge.
Reserved.
7
0
2
2
2
2
C interrupt is disabled.
C interrupt is enabled.
C interrupt flag is not set.
C interrupt flag is set.
2
2
C bus (SCL/SDA) is disabled and all inputs are ignored.
C bus (SCL/SDA) is enabled.
R/W
6
0
(I2C_CTL = 00CBh)
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R
1
0
Product Specification
R
0
0
I
2
C Serial I/O Interface
eZ80F91 ASSP
229

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