EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 340

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

Table 220. EMAC Receive Write Pointer Register—Low Byte
PS027001-0707
5
NVALID
[4:0]
RDADR
Bit
Reset
CPU Access
Note: R = Read Only.
Bit
Position
[7:0]
EMAC_RWP_L
EMAC Receive Write Pointer Register—Low Byte
The Read Only Receive-Write-Pointer register reports the current RxDMA Receive Write
pointer. This pointer gets initialized to EmacTLBP whenever Emac_RST bits SRST or
HRRTN are set. Because the size of the packet is limited to a minimum of 32 bytes, the
last five bits are always zero. See
1
0
00h–1Fh Denotes PHY addressed in current scan cycle.
Value
00h–
E0h
MII Scan result is not valid Emac_PRSD is invalid
Emac_PRSD is valid.
R
7
0
Description
These bits represent the Low byte of the 2 byte EMAC
RxDMA Receive Write Pointer value, {EMAC_RWP_H,
EMAC_RWP_L}. Bit 7 is bit 7 of the 16 bit value. Bit 0 is bit 0
(lsb) of the 16 bit value.
R
6
0
R
5
0
Table 220
R
4
0
R
and
3
0
Table 221
R
2
0
(EMAC_RWP_L = 0051h)
on page 333.
Ethernet Media Access Controller
R
1
0
Product Specification
R
0
0
eZ80F91 ASSP
332