EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 293

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

Table 168. Opcode Map—Second Opcode after 0CBh
Legend
PS027001-0707
of Second
First Operand
Opcode
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
Nibble
Upper
Note: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
RLC
RES
RES
RES
RES
SET
SET
SET
SET
SLA
BIT
0,B
BIT
2,B
BIT
4,B
BIT
6,B
0,B
2,B
4,B
6,B
0,B
2,B
4,B
6,B
RL
0
B
B
B
Lower Nibble of 2nd Opcode
RLC
RES
RES
RES
RES
SET
SET
SET
SET
A
SLA
BIT
0,C
BIT
2,C
BIT
4,C
BIT
6,C
0,C
2,C
4,C
6,C
0,C
2,C
4,C
6,C
RL
C
C
C
1
RES
4,H
4
RLC
RES
RES
RES
RES
SLA
SET
SET
SET
SET
BIT
0,D
BIT
2,D
BIT
4,D
BIT
6,D
0,D
2,D
4,D
6,D
0,D
2,D
4,D
6,D
RL
D
D
D
2
Second Operand
Mnemonic
RLC
RES
RES
RES
RES
SLA
SET
SET
SET
SET
BIT
BIT
BIT
BIT
0,E
2,E
4,E
6,E
0,E
2,E
4,E
6,E
0,E
2,E
4,E
6,E
RL
E
E
E
3
RES
RES
RES
RES
RLC
SLA
SET
SET
SET
SET
BIT
0,H
BIT
2,H
BIT
4,H
BIT
6,H
0,H
2,H
4,H
6,H
0,H
2,H
4,H
6,H
RL
H
H
H
4
RES
RES
RES
RES
RLC
SLA
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RL
0,L
2,L
4,L
6,L
0,L
2,L
4,L
6,L
0,L
2,L
4,L
6,L
5
L
L
L
0,(HL)
2,(HL)
4,(HL)
6,(HL)
0,(HL)
2,(HL)
4,(HL)
6,(HL)
0,(HL)
2,(HL)
4,(HL)
6,(HL)
RES
RES
RES
RES
RLC
(HL)
(HL)
(HL)
SET
SET
SET
SET
SLA
BIT
BIT
BIT
BIT
RL
6
Lower Nibble (Hex)
RLC
RES
RES
RES
RES
SET
SET
SET
SET
SLA
BIT
0,A
BIT
2,A
BIT
4,A
BIT
6,A
0,A
2,A
4,A
6,A
0,A
2,A
4,A
6,A
RL
7
A
A
A
RRC
SRA
SRL
RES
RES
RES
RES
SET
SET
SET
SET
BIT
1,B
BIT
3,B
BIT
5,B
BIT
7,B
1,B
3,B
5,B
7,B
1,B
3,B
5,B
7,B
RR
8
B
B
B
B
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,C
BIT
3,C
BIT
5,C
BIT
7,C
1,C
3,C
5,C
7,C
1,C
3,C
5,C
7,C
RR
C
C
C
C
9
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,D
BIT
3,D
BIT
5,D
BIT
7,D
1,D
3,D
5,D
7,D
1,D
3,D
5,D
7,D
RR
A
D
D
D
D
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RR
1,E
3,E
5,E
7,E
1,E
3,E
5,E
7,E
1,E
3,E
5,E
7,E
B
E
E
E
E
Product Specification
eZ80
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
RR
BIT
1,H
BIT
3,H
BIT
5,H
BIT
7,H
1,H
3,H
5,H
7,H
1,H
3,H
5,H
7,H
C
H
H
H
H
®
CPU Instruction Set
eZ80F91 ASSP
RRC
SRA
SRL
RES
RES
RES
RES
SET
SET
SET
SET
RR
BIT
BIT
BIT
BIT
1,L
3,L
5,L
7,L
1,L
3,L
5,L
7,L
1,L
3,L
5,L
7,L
D
L
L
L
L
1,(HL)
3,(HL)
5,(HL)
7,(HL)
1,(HL)
3,(HL)
5,(HL)
7,(HL)
1,(HL)
3,(HL)
5,(HL)
7,(HL)
RRC
(HL)
(HL)
SRA
(HL)
SRL
(HL)
RES
RES
RES
RES
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RR
E
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,A
BIT
3,A
BIT
5,A
BIT
7,A
1,A
3,A
5,A
7,A
1,A
3,A
5,A
7,A
RR
F
A
A
A
A
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