EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 43

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

Table 3. Register Map (Continued)
PS027001-0707
Address
(hex)
00B3
Random Access Memory Control
00B4
00B5
00B6
00B7
Serial Peripheral Interface
00B8
00B9
00BA
00BB
00BC
Infrared Encoder/Decoder
00BF
Universal Asynchronous Receiver/Transmitter 0 (UART0)
00C0
00C1
00C2
Universal Asynchronous Receiver/Transmitter 0 (UART0)
00C3
Mnemonic
CS3_CTL
RAM_CTL
RAM_ADDR_U
MBIST_GPR
MBIST_EMR
SPI_BRG_L
SPI_BRG_H
SPI_CTL
SPI_SR
SPI_TSR
SPI_RBR
IR_CTL
UART0_RBR
UART0_THR
UART0_BRG_L
UART0_IER
UART0_BRG_H
UART0_IIR
UART0_FCTL
UART0_LCTL
Name
Chip Select 3 Control Register
RAM Control Register
RAM Address Upper Byte Register
General Purpose RAM MBIST Control
Ethernet MAC RAM MBIST Control
SPI Baud Rate Generator
Register—Low Byte
SPI Baud Rate Generator
Register—High Byte
SPI Control Register
SPI Status Register
SPI Transmit Shift Register
SPI Receive Buffer Register
Infrared Encoder/Decoder Control
UART 0 Receive Buffer Register
UART 0 Transmit Holding Register
UART 0 Baud Rate Generator
Register—Low Byte
UART 0 Interrupt Enable Register
UART 0 Baud Rate Generator
Register—High Byte
UART 0 Interrupt Identification Register
UART 0 FIFO Control Register
UART 0 Line Control Register
Reset
(hex)
XX
XX
XX
XX
C0
FF
00
00
00
02
00
04
00
00
02
00
00
01
00
00
Product Specification
Access
eZ80F91 ASSP
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R
R
R
Register Map
Page
209
209
210
212
212
201
184
184
182
185
183
186
187
188
211
No
87
94
95
96
96
35