EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 50

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

PS027001-0707
Internal RESET
System Clock
V
CC
Power-On Reset
Voltage Brownout Reset
= 0.0V
Signal
V
V
POR
VBO
A POR occurs every time the supply voltage to the part rises from below the Voltage
Brownout threshold (V
bandgap-referenced voltage detector sends a continuous RESET signal to the Reset con-
troller until the supply voltage (V
above V
Reset controller. After this analog delay element times out, the Reset controller holds the
eZ80F91 in RESET until the RESET mode timer expires. POR operation is illustrated in
Figure
If the supply voltage (V
eZ80F91 device resets. The VBO protection circuitry detects the low supply voltage and
initiates a RESET via the Reset controller. The eZ80F91 remains in RESET until the sup-
ply voltage again returns above the POR voltage threshold (V
releases the internal RESET signal. The VBO circuitry rejects short negative brown-out
pulses to prevent spurious RESET events.
VBO operation is illustrated in
drawn to scale but for illustration purposes only.
3. The signals in
POR
, an on-chip analog delay element briefly maintains the RESET signal to the
Oscillator
Startup
Figure 3. Power-On Reset Operation
VBO
CC
Figure 3
T
ANA
) drops below the V
) to above the POR voltage threshold (V
Figure 4
are not drawn to scale but for illustration purposes only.
CC
RESET mode timer delay
) exceeds the POR voltage threshold. After V
on page 43. The signals in the figure are not
VBO
after program execution begins, the
POR
Product Specification
) and the Reset controller
POR
Program Execution
). The internal
eZ80F91 ASSP
V
CC
CC
= 3.3V
Reset
rises
42