HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 12

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.8
2.9
Section 3 Exception Handling .............................................................................75
3.1
3.2
3.3
3.4
Section 4 Clock Pulse Generators .....................................................................103
4.1
4.2
4.3
4.4
4.5
Rev. 8.00 Mar. 09, 2010 Page x of xx
REJ09B0042-0800
2.7.3
2.7.4
Memory Map ....................................................................................................................... 60
2.8.1
Application Notes ................................................................................................................ 66
2.9.1
2.9.2
2.9.3
Overview.............................................................................................................................. 75
Reset..................................................................................................................................... 75
3.2.1
3.2.2
3.2.3
Interrupts .............................................................................................................................. 77
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
Application Notes ................................................................................................................ 98
3.4.1
3.4.2
3.4.3
Overview............................................................................................................................ 103
4.1.1
4.1.2
4.1.3
System Clock Generator .................................................................................................... 106
Subclock Generator............................................................................................................ 111
Prescalers ........................................................................................................................... 113
Note on Oscillators............................................................................................................. 115
4.5.1
4.5.2
4.5.3
Program Halt State.................................................................................................. 59
Exception-Handling State ....................................................................................... 59
Memory Map .......................................................................................................... 60
Notes on Data Access ............................................................................................. 66
Notes on Bit Manipulation...................................................................................... 68
Notes on Use of the EEPMOV Instruction ............................................................. 74
Overview................................................................................................................. 75
Reset Sequence ....................................................................................................... 75
Interrupt Immediately after Reset ........................................................................... 76
Overview................................................................................................................. 77
Interrupt Control Registers...................................................................................... 79
External Interrupts .................................................................................................. 90
Internal Interrupts.................................................................................................... 91
Interrupt Operations ................................................................................................ 92
Interrupt Response Time......................................................................................... 97
Notes on Stack Area Use ........................................................................................ 98
Notes on Rewriting Port Mode Registers................................................................ 99
Method for Clearing Interrupt Request Flags ....................................................... 101
Block Diagram ...................................................................................................... 103
System Clock and Subclock.................................................................................. 104
Register Descriptions ............................................................................................ 105
Definition of Oscillation Stabilization Wait Time ................................................ 116
Notes on Use of Crystal Oscillator Element (Excluding Ceramic Oscillator
Element)................................................................................................................ 118
Note on Use of HD64F38024 ............................................................................... 119