HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 308

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Timers
Input Capture Register GF (ICRGF)
ICRGF is an 8-bit read-only register. When a falling edge of the input capture input signal is
detected, the current TCG value is transferred to ICRGF. If IIEGS in TMG is 1 at this time,
IRRTG in IRR2 is set to 1, and if IENTG in IENR2 is 1, an interrupt request is sent to the CPU.
For details of the interrupt, see section 3.3, Interrupts.
To ensure dependable input capture operation, the pulse width of the input capture input signal
must be at least 2φ or 2φ
ICRGF is initialized to H'00 upon reset.
Input Capture Register GR (ICRGR)
ICRGR is an 8-bit read-only register. When a rising edge of the input capture input signal is
detected, the current TCG value is transferred to ICRGR. If IIEGS in TMG is 0 at this time,
IRRTG in IRR2 is set to 1, and if IENTG in IENR2 is 1, an interrupt request is sent to the CPU.
For details of the interrupt, see section 3.3, Interrupts.
To ensure dependable input capture operation, the pulse width of the input capture input signal
must be at least 2φ or 2φ
ICRGR is initialized to H'00 upon reset.
Rev. 8.00 Mar. 09, 2010 Page 286 of 658
REJ09B0042-0800
Bit:
Initial value:
Read/Write:
Bit:
Initial value:
Read/Write:
ICRGR7
ICRGF7
R
R
7
0
7
0
SUB
SUB
ICRGR6
ICRGF6
(when the noise canceler is not used).
(when the noise canceler is not used).
R
R
6
0
6
0
ICRGR5
ICRGF5
R
R
5
0
5
0
ICRGR4
ICRGF4
R
R
4
0
4
0
ICRGR3
ICRGF3
R
R
3
0
3
0
ICRGR2
ICRGF2
R
R
2
0
2
0
ICRGR1
ICRGF1
R
R
1
0
1
0
ICRGR0
ICRGF0
R
R
0
0
0
0

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