HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 622

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Appendix B Internal I/O Registers
SYSCR1—System Control Register 1
Bit
Initial value
Read/Write
Notes: 1. Applies to products other than the H8/38124 Group.
Rev. 8.00 Mar. 09, 2010 Page 600 of 658
REJ09B0042-0800
2. Applies to the H8/38124 Group.
SSBY
R/W
Software Standby
0 • When a SLEEP instruction is executed in active mode, a transition is
1
7
0
• When a SLEEP instruction is executed in subactive mode, a transition
• When a SLEEP instruction is executed in active mode, a transition is
• When a SLEEP instruction is executed in subactive mode, a transition
made to sleep mode
is made to subsleep mode
made to standby mode or watch mode
is made to watch mode
Standby Timer Select 2 to 0
0
1
STS2
R/W
0 0
1 0
0 0
1 0
6
0
1
1
1
1
Wait time = 8,192 states *
Wait time = 16,384 states *
Wait time = 1,024 states *
Wait time = 2,048 states *
Wait time = 4,096 states *
Wait time = 2 states *
Wait time = 8 states *
Wait time = 16 states *
STS1
R/W
5
0
Low Speed on Flag
STS0
R/W
0 The CPU operates on the system clock (φ)
1 The CPU operates on the subclock (φ
4
0
1
1
LSON
1
R/W
3
0
1
1
1
1
1
H'F0
Wait time = 8,192 states *
Wait time = 16,384 states *
Wait time = 32,768 states *
Wait time = 65,536 states *
Wait time = 131,072 states *
Wait time = 2 states *
Wait time = 8 states *
Wait time = 16 states *
Active (medium-speed)
Mode Clock Select
⎯
⎯
2
1
0
1
0
1
0
1
φ
φ
φ
φ
osc
osc
osc
osc
MA1
R/W
1
1
/128
/16
/32
/64
System Control
2
2
2
MA0
R/W
SUB
0
1
2
2
2
2
)
2