HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 120

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 3 Exception Handling
3.4
3.4.1
When word data is accessed in the LSI, the least significant bit of the address is regarded as 0.
Access to the stack always takes place in word size, so the stack pointer (SP: R7) should never
indicate an odd address. Use PUSH Rn (MOV.W Rn, @–SP) or POP Rn (MOV.W @SP+, Rn) to
save or restore register values.
Setting an odd address in SP may cause a program to crash. An example is shown in figure 3.6.
When CCR contents are saved to the stack during interrupt exception handling or restored when
RTE is executed, this also takes place in word size. Both the upper and lower bytes of word data
are saved to the stack; on return, the even address contents are restored to CCR while the odd
address contents are ignored.
Rev. 8.00 Mar. 09, 2010 Page 98 of 658
REJ09B0042-0800
SP
→
SP set to H'FEFF
[Legend]
PC
PC
R1L:
SP:
Notes on Stack Area Use
Application Notes
H
L
:
:
Upper byte of program counter
Lower byte of program counter
General register R1L
Stack pointer
Figure 3.6 Operation when Odd Address is Set in SP
BSR instruction
SP
Stack accessed beyond SP
→
PC
PC
H
L
MOV. B R1L, @−R7
SP
→
Contents of PC are lost
PC
R1L
L
H
H'FEFC
H'FEFD
H'FEFF