HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 280

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Timers
Bits 6 and 5—Counter Up/Down Control (TMC6, TMC5)
Selects whether TCC up/down control is performed by hardware using UD pin input, or whether
TCC functions as an up-counter or a down-counter.
Bit 6
TMC6
0
0
1
Bits 4 and 3—Reserved
Bits 4 and 3 are reserved; they are always read as 1 and cannot be modified.
Bits 2 to 0—Clock Select (TMC2 to TMC0)
Bits 2 to 0 select the clock input to TCC. For external event counting, either the rising or falling
edge can be selected.
Bit 2
TMC2
0
0
0
0
1
1
1
1
Note: * The edge of the external event signal is selected by bit IEG1 in the IRQ edge select
Rev. 8.00 Mar. 09, 2010 Page 258 of 658
REJ09B0042-0800
register (IEGR). See IRQ Edge Select Register (IEGR) in section 3.3.2, Interrupt Control
Registers, for details. IRQ1 in port mode register B (PMRB) must be set to 1 before
setting 111 in bits TMC2 to TMC0.
Bit 1
TMC1
0
0
1
1
0
0
1
1
Bit 5
TMC5
0
1
*
Bit 0
TMC0
0
1
0
1
0
1
0
1
Description
TCC is an up-counter
TCC is a down-counter
Hardware control by UD pin input
UD pin input high: Down-counter
UD pin input low: Up-counter
Description
Internal clock: φ/8192
Internal clock: φ/2048
Internal clock: φ/512
Internal clock: φ/64
Internal clock: φ/16
Internal clock: φ/4
Internal clock: φ
External event (TMIC): rising or falling edge *
W
/4
(initial value)
(initial value)
*: Don't care

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