HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 121

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.4.2
When a port mode register is rewritten to switch the functions of external interrupt pins and when
the value of ECPWME in AEGSR is rewritten to switch between selection/non-selection of
IRQAEC, the following points should be observed.
When an external interrupt pin function is switched by rewriting the port mode register that
controls pins IRQ
the time the pin function is switched, even if no valid interrupt is input at the pin. Be sure to clear
the interrupt request flag to 0 after switching pin functions. When the value of ECPWME in
AEGSR that sets selection/non-selection of IRQAEC is rewritten, the interrupt request flag may
be set to 1, even if a valid edge has not arrived on the selected IRQAEC or IECPWM (PWM
output for AEC). Therefore, be sure to clear the interrupt request flag to 0 after switching the pin
function. Table 3.5 shows the conditions under which interrupt request flags are set to 1 in this
way.
Table 3.5
Interrupt Request
Flags Set to 1
IRR1
Notes on Rewriting Port Mode Registers
IRRI4
IRRI3
IRREC2
IRRI1
IRRI0
Conditions under which Interrupt Request Flag is Set to 1
4
, IRQ
Conditions
When PMR1 bit IRQ4 is changed from 0 to 1 while pin IRQ
IEG4 = 0.
When PMR1 bit IRQ4 is changed from 1 to 0 while pin IRQ
IEG4 = 1.
When PMR1 bit IRQ3 is changed from 0 to 1 while pin IRQ
IEG3 = 0.
When PMR1 bit IRQ3 is changed from 1 to 0 while pin IRQ
IEG3 = 1.
When an edge as designated by AIEGS1 and AIEGS0 in AEGSR is detected
because the values on the IRQAEC pin and of IECPWM at switching are different
(e.g., when the rising edge has been selected and ECPWME in AEGSR is changed
from 1 to 0 while pin IRQAEC is low and IECPWM = 1).
When PMRB bit IRQ1 is changed from 0 to 1 while pin IRQ
IEG1 = 0.
When PMRB bit IRQ1 is changed from 1 to 0 while pin IRQ
IEG1 = 1.
When PMR2 bit IRQ0 is changed from 0 to 1 while pin IRQ
IEG0 = 0.
When PMR2 bit IRQ0 is changed from 1 to 0 while pin IRQ
IEG0 = 1.
3
, IRQ
1
, IRQ
0
, WKP
7
to WKP
0
, the interrupt request flag may be set to 1 at
Rev. 8.00 Mar. 09, 2010 Page 99 of 658
Section 3 Exception Handling
4
4
3
3
0
0
1
1
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
is low and IEGR bit
REJ09B0042-0800

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