HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 345

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 2—Count-up Enable L (CUEL)
Bit 2 enables event clock input to ECL. When 1 is written to this bit, event clock input is enabled
and increments the counter. When 0 is written to this bit, event clock input is disabled and the
ECL value is held.
Bit 2
CUEL
0
1
Bit 1—Counter Reset Control H (CRCH)
Bit 1 controls resetting of ECH. When this bit is cleared to 0, ECH is reset. When 1 is written to
this bit, the counter reset is cleared and the ECH count-up function is enabled.
Bit 1
CRCH
0
1
Bit 0—Counter Reset Control L (CRCL)
Bit 0 controls resetting of ECL. When this bit is cleared to 0, ECL is reset. When 1 is written to
this bit, the counter reset is cleared and the ECL count-up function is enabled.
Bit 0
CRCL
0
1
Event Counter H (ECH)
Bit
Initial Value
Read/Write
Description
ECL event clock input is disabled
ECL value is held
ECL event clock input is enabled
Description
ECH is reset
ECH reset is cleared and count-up function is enabled
Description
ECL is reset
ECL reset is cleared and count-up function is enabled
ECH7
0
R
7
ECH6
0
R
6
ECH5
0
R
5
ECH4
R
4
0
Rev. 8.00 Mar. 09, 2010 Page 323 of 658
ECH3
0
R
3
ECH2
R
2
0
REJ09B0042-0800
ECH1
Section 9 Timers
0
R
1
(initial value)
(initial value)
(initial value)
ECH0
R
0
0