HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 60

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
2.5
The H8/300L Series can use a total of 55 instructions, which are grouped by function in table 2.3.
Table 2.3
Notes: 1. PUSH Rn is equivalent to MOV.W Rn, @–SP.
The following sections give a concise summary of the instructions in each category, and indicate
the bit patterns of their object code. The notation used is defined next.
Rev. 8.00 Mar. 09, 2010 Page 38 of 658
REJ09B0042-0800
Function
Data transfer
Arithmetic operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer
2. Bcc is a conditional branch instruction in which cc represents a condition code.
Instruction Set
POP Rn is equivalent to MOV.W @SP+, Rn. The same applies to the machine
language.
Instruction Set
Instructions
MOV, PUSH *
ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, DAA,
DAS, MULXU, DIVXU, CMP, NEG
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR,
BXOR, BIXOR, BLD, BILD, BST, BIST
Bcc *
RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP
EEPMOV
2
, JMP, BSR, JSR, RTS
1
, POP *
1
Number
1
14
4
14
Total: 55
8
5
8
1